Domain

AI / Datacenter

RDMA verbs, InfiniBand/RoCE, and GPU fabric paths.

Stack map

  1. RDMA Verbs
  2. RoCEv2
  3. InfiniBand
  4. NCCL
  5. NVLink
  6. PCI Express

Protocols in this domain

RDMA Verbs

Lab ready

Kernel-bypass networking model: queue pairs, memory regions, and work requests move data between registered buffers with minimal CPU. Com…

aistorage

RoCEv2

Lab ready

RDMA over UDP/IPv4/IPv6 on Ethernet: InfiniBand BTH follows the UDP header (port 4791). Routable across L3 with ECN/PFC/DCQCN for congest…

ai

InfiniBand

Lab ready

Lossless switched fabric with its own L2/L3 (LID/GID), subnet manager, and verbs transport (RC/UD/…). Credits, VLs, and partition keys pr…

ai

Ethernet II

Lab ready

Ubiquitous LAN frame: 6-byte MACs, 2-byte EtherType, payload, and 32-bit FCS. Preamble/SFD precede the frame on the wire; 802.1Q inserts …

internetindustrialai

TCP

Lab ready

Reliable, ordered byte-stream transport with ports, sequence/ack numbers, windowing, and congestion control. Three-way handshake and four…

internettelephonyindustrialai

OPC UA

Lab ready

Platform-independent industrial information model with secure channels, sessions, subscriptions, and monitored items. Binary UA-TCP and H…

industrialai

RoCE v1

Lab ready

RDMA over Converged Ethernet version 1 encapsulates InfiniBand verbs in Ethernet frames without IP/UDP headers. It is an L2-only design l…

ai

iWARP

Lab ready

RDMA over TCP/IP using MPA framing with DDP and RDMAP layers. It traverses lossy networks better than RoCE but needs different NIC offloa…

aiinternet

PFC / ECN

Lab ready

Lossless and ECN tools for datacenter Ethernet: Priority Flow Control pauses individual priorities, while Explicit Congestion Notificatio…

aiinternet

DCQCN

Lab ready

Data Center Quantized Congestion Notification — RoCE congestion control that uses ECN marks and Congestion Notification Packets to rate-l…

ai

GPUDirect RDMA

Lab ready

NIC DMA path that reads and writes GPU memory directly, bypassing host bounce buffers for RDMA verbs. Requires peer-to-peer BAR mapping, …

ai

dma-buf

Lab ready

Linux buffer-sharing primitive for zero-copy exchange across drivers such as GPU, NIC, and media. Exporters and importers negotiate acces…

aistorage

NCCL

Lab ready

NVIDIA Collective Communications Library implementing allreduce, broadcast, and related GPU collectives over NVLink, PCIe, and RDMA. Topo…

ai

RCCL

Lab ready

AMD ROCm Collective Communications Library — the ROCm counterpart to NCCL for GPU collectives. It uses Infinity Fabric, PCIe, and RDMA pa…

ai

MPI

Lab ready

Message Passing Interface — portable parallel messaging with point-to-point and collective operations across ranks. Implementations map t…

ai

SHARP

Lab ready

Scalable Hierarchical Aggregation and Reduction Protocol — Mellanox/NVIDIA in-network aggregation for MPI/NCCL collectives on InfiniBand …

ai

gRPC

Lab ready

RPC framework on HTTP/2 with protobuf stubs, streaming RPCs, deadlines, and metadata. Widely used as the control plane for ML serving, mi…

aiinternet

HTTP/2

Lab ready

Multiplexed binary framing over a single TLS/TCP connection with streams, HPACK headers, and flow-control windows. It underpins gRPC and …

internetai

Triton Inference Protocol

Lab ready

HTTP/gRPC model-inference APIs popularized by Triton/KServe V2: readiness/liveness, infer, and model-repository control. Tensor contents,…

ai

Arrow Flight

Lab ready

gRPC protocol for bulk Apache Arrow record-batch transfer with DoGet/DoPut and FlightDescriptors. Columnar data moves with minimal copies…

aiinternet

NVLink

Lab ready

NVIDIA high-bandwidth GPU interconnect for peer-to-peer and coherent-ish memory traffic inside a node or NVSwitch domain. Generations dif…

ai

NVSwitch

Lab ready

Switch fabric chip that stitches many NVLink ports into all-to-all GPU topologies in DGX/HGX-class systems. Enables full-bandwidth collec…

ai

CXL

Lab ready

Compute Express Link — a cache-coherent interconnect riding PCIe PHY for memory expanders and accelerators. .io, .cache, and .mem protoco…

aistorage

UCIe

Lab ready

Universal Chiplet Interconnect Express — a die-to-die standard with streaming and protocol mappings (including PCIe/CXL). Advanced packag…

ai

PCI Express

Lab ready

PCI Express — packetized serial I/O with lanes, LTSSM link training, and TLP/DLLP layers. Gen5/Gen6 rates and retimers define reach; ACS …

aistorageembedded

NVMe over Fabrics

Lab ready

NVMe over Fabrics extends NVMe queues across RDMA, TCP, or Fibre Channel. Capsules map submission/completion queue entries over the fabri…

storageai

GPUDirect Storage

Lab ready

GPUDirect Storage (GDS) provides a direct DMA path between NVMe and GPU memory, skipping host bounce buffers. Filesystem and driver suppo…

aistorage

UDP

Lab ready

User Datagram Protocol — connectionless transport with ports and an optional checksum. It is the basis for DNS, RTP, QUIC, DHCP, and RoCE…

internettelephonyai

NVMe

Lab ready

NVM Express — PCIe register and queue interface for SSDs with submission/completion queues, PRP/SGL data pointers, and admin commands. Pa…

storageai

Protocol Buffers

Lab ready

Protocol Buffers — language-neutral binary serialization with tagged fields and disciplined schema evolution. Default encoding for gRPC r…

aiinternet